The present invention relates to antifuses used on a semiconductor circuit. The present invention especially relates to antifuses using composite dielectric layers.
Antifuses are used in memory devices or in field programmable gate arrays (FPGA). Antifuses are circuit elements that can be programmed to form a lower-impedance connection. A programming voltage across the electrodes of the antifuse breaks down an antifuse dielectric.
Antifuses are different from charge storing elements, such as erasable programmable memory (EPROM) or dynamic random access memory (DRAM). An antifuse's programming involves the permanent, unerasable breakdown of the antifuse dielectric.
There are two main types of antifuses. The first type uses amorphous polysilicon as the antifuse dielectric. This first type of antifuse is usually created between metallization layers. The other type of antifuse uses a composite dielectric layer as the antifuse dielectric.
An example of an antifuse with a composite dielectric layer is described in Hamdy et al. U.S. Pat. No. 5,412,244, incorporated herein by reference. The composite dielectric layer for the antifuse of the Hamdy et al. patent is described as preferably having a bottom oxide layer of 20 to 50 angstroms, a central silicon nitride layer of 40 to 100 angstroms, and a top oxide layer of 0 to 50 angstroms.
As circuits are scaled down and lower operating voltages are used, the programming voltage needs to be reduced to around six to seven volts from about nine volts. The thicknesses of the interlevel dielectrics, such as gate oxide layers, are reduced as the size of the circuits are reduced. It is important that the programming voltage not damage the thinner gate oxide layers causing shorts in the circuit.
There is thus a need for an antifuse dielectric that can reliably be used with low programming and operating voltages.